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	<title>Verification Martial Arts &#187; vmm_xactor</title>
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		<title>Shared Register Access in RAL though multiple physical interfaces</title>
		<link>http://www.vmmcentral.org/vmartialarts/2010/09/shared-register-access-in-ral-though-multiple-physical-interfaces/</link>
		<comments>http://www.vmmcentral.org/vmartialarts/2010/09/shared-register-access-in-ral-though-multiple-physical-interfaces/#comments</comments>
		<pubDate>Sun, 19 Sep 2010 15:10:39 +0000</pubDate>
		<dc:creator>Amit Sharma</dc:creator>
				<category><![CDATA[Register Abstraction Model with RAL]]></category>
		<category><![CDATA[Uncategorized]]></category>
		<category><![CDATA[vmm_xactor]]></category>

		<guid isPermaLink="false">http://www.vmmcentral.org/vmartialarts/?p=1919</guid>
		<description><![CDATA[Amit Sharma, Synopsys Usually, designs have a single interface but some designs may have more than one physical interface, each with accessible registers or memories. RAL supports designs with multiple physical interfaces, as well as registers and memories shared across multiple interfaces. In RAL, a physical interface is called a domain. Only blocks and systems [...]]]></description>
			<content:encoded><![CDATA[<p><strong>Amit Sharma, Synopsys</strong></p>
<p>Usually, designs have a single interface but some designs may have more than one physical interface, each with accessible registers or memories. RAL supports designs with multiple physical interfaces, as well as registers and memories shared across multiple interfaces.</p>
<p>In RAL, a physical interface is called a domain. Only blocks and systems can have domains. Domains can contain registers and memories.</p>
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<p>&#160;</p>
<p>Now, how do you enable a register or a memory to be shared across multiple physical interfaces or ‘domains’ in RAL? This is done by declaring the register/memory as &#8216;shared&#8217; in the RALF file and instantiating it in more than one domain. Once this is done, the functionality will be enabled in the generated RAL model. </p>
<p>Let us take an example. Suppose the design block has two domains or interfaces (say pci/ahb) which can have a shared access to the register STATUS. This can be specified through the ‘shared’ keyword in the register description in RALF file, generating a RAL block model, as follows. </p>
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<p>In the example above, the text box on the left shows a snippet of the generated code. You can see that ‘domain’s do not create an additional level of hierarchy. The different registers belonging to the two domains in the block are available in the flat namespace in the block and can be accessed directly without specifying the domain name in the access hierarchy. <a></a></p>
<p>Once a register is defined as &#8216;shared&#8217;, I can go ahead and access that register through different domains. A typical usage scenario for a ‘shared’ register is that it can be read from one interface and written from another interface. The two different physical BFMs are mapped to the corresponding domains easily in the SV environment.</p>
<p>The following snippet of code how this is done:</p>
<p><i>this.ahb = new(&#8230;); // AHB BFM instantiation</i></p>
<p><i>this.ral.add_xactor(this.ahb, &quot;ahb&quot;); //tying the AHB BFM to the “ahb” domain</i></p>
<p><i>this.pci = new(&#8230;); // PCI BFM instantiation</i></p>
<p><i>this.ral.add_xactor(this.pci, &quot;pci&quot;); //tying the PCI BFM to the “pci” domain</i></p>
<p>Once the mapping is done, the way you access a specific ‘shared’ register is quite simple. You need to additionally specify the ‘domain’ name in your read/write task</p>
<p><a href="http://www.vmmcentral.org/vmartialarts/wp-content/plugins/feed-statistics.php?url=aHR0cDovL3d3dy52bW1jZW50cmFsLm9yZy92bWFydGlhbGFydHMvd3AtY29udGVudC91cGxvYWRzLzIwMTAvMDkvaW1hZ2U1LnBuZw=="><img style="border-bottom: 0px;border-left: 0px;float: none;margin-left: auto;border-top: 0px;margin-right: auto;border-right: 0px" border="0" alt="image" src="http://www.vmmcentral.org/vmartialarts/wp-content/uploads/2010/09/image_thumb5.png" width="415" height="159" /></a> </p>
<p>When you make the writes/reads as described above, the accesses would be routed through the different BFMs corresponding to the different domains as specified through the ‘domain’ argument<a>&#160;</a> in the read/write access tasks as seen in the code specified in the textbox above.</p>
<p>In the test environment, if simulation is run with &#8216;trace&#8217; or &#8216;debug&#8217; verbosity , details of the access to the shared register through different domains can be observed. </p>
<p>The following lines shows a snippet of messages going to STDOUT</p>
<p>//&#8212;&#8212;&#8212;</p>
<p>Trace[DEBUG] on RVM RAL Access(Main) at 135:</p>
<p>Writing &#8216;h00000000000000aa at &#8216;h0000000000000A004 via domain &quot;pci&quot;&#8230;</p>
<p>Trace[DEBUG] on RAL(register) at 245:</p>
<p>Wrote register &quot;ral_model.INT_MASK&quot; via frontdoor with: &#8216;h00000000000000aa</p>
<p>Trace[DEBUG] on RVM RAL Access(Main) at 355:</p>
<p>Read &#8216;h00000000000000aa from &#8216;h0000000000000002 via domain &quot;ahb&quot;&#8230;</p>
<p>Trace[DEBUG] on RAL(register) at 355:</p>
<p>Read register &quot;ral_model.INT_MASK&quot; via frontdoor: &#8216;h00000000000000aa</p>
<p>//&#8212;&#8212;&#8212;</p>
<p>By the way, one of the pre-defined tests that ship with the VMM RAL is the &quot;shared_access&quot; test. It exercises all shared registers and memories using the following process for each domain (requires at least one domain with READ capability or backdoor access).</p>
<p>- Write a random value via one domain</p>
<p>- Check the content via all other domains.</p>
<p>Hence, without writing a single line of test code, you can verify the basic functionality of all shared registers/memories of your DUT through this test.</p>
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		<title>How VMM can help controlling transactors easily?</title>
		<link>http://www.vmmcentral.org/vmartialarts/2009/05/how-vmm-can-help-controlling-transactors-easily/</link>
		<comments>http://www.vmmcentral.org/vmartialarts/2009/05/how-vmm-can-help-controlling-transactors-easily/#comments</comments>
		<pubDate>Fri, 29 May 2009 15:45:54 +0000</pubDate>
		<dc:creator>Fabian Delguste</dc:creator>
				<category><![CDATA[Configuration]]></category>
		<category><![CDATA[Structural Components]]></category>
		<category><![CDATA[SystemVerilog]]></category>
		<category><![CDATA[Tutorial]]></category>
		<category><![CDATA[vmm_xactor]]></category>

		<guid isPermaLink="false">http://www.vmmcentral.org/vmartialarts/?p=200</guid>
		<description><![CDATA[Fabian Delguste / Synopsys Verification Group Controlling VMM transactors can sometimes be a bit hectic. A typical situation I see is when I have registered a list of transactors for driving some DUT interfaces but only want to start a few of them. Another common situation is when I want to turn off scenario generators [...]]]></description>
			<content:encoded><![CDATA[<p>Fabian Delguste / Synopsys Verification Group</p>
<p>Controlling VMM transactors can sometimes be a bit hectic. A typical situation I see is when I have registered a list of transactors for driving some DUT interfaces but only want to start a few of them. Another common situation is when I want to turn off scenario generators and replay transactions directly from a file. Yet another task I often face is registering transactor callbacks without knowing where they are exactly located in the environment.</p>
<p>As you can see, there are many situations where fine-grain functional control of transactors is necessary.</p>
<p>Since VMM 1.1 came out, I have been using a new base class called vmm_xactor_iter that allows accessing any transactor directly by name. In this case all I need to do is to construct a vmm_xactor_iter with regular expression and use the iterator to loop thru all matching transactors.</p>
<p>To understand better how this base class works, I’ll show you a real life example. The scope of this example is to show how to start generators only when vmm_channel playback has not been turned on. As you know vmm_channel can be used to replay transactions directly from files that contain transactions that were recorded in a previous session. This can speed up simulation by turning off constraint solving.</p>
<blockquote><p>1. string match_xactors = (cfg.mode == tb_cfg::PLAYBACK) ? /Drivers/&#8221; : &#8220;/./&#8221;;</p>
<p>2.</p>
<p>3. `<strong>foreach_vmm_xactor</strong>(vmm_xactor, &#8220;/./&#8221;, match_xactors)</p>
<p>4. begin</p>
<p>5.  `vmm_note(log, $psprintf(&#8220;Starting %s&#8221;, xact.get_instance()));</p>
<p>6.   xact.start_xactor();</p>
<p>7. end</p></blockquote>
<ul>
<li>In line 1, match_xactors string takes “Drivers*” value when playback mode is selected otherwise it takes “.” when no this mode is not selected. In the first case, transactors named “Drivers” match otherwise all transactors, including generators match</li>
<li>In line 3, `foreach_vmm_xactor macro is used to create a vmm_xactor_iter using previous regular expression. This macro can be used to traverse and start all matching objects by using the xact object to access transactors</li>
</ul>
<p>In case you’d like to have more control over vmm_xactor_iter, it’s possible to use its first() / next() / xactor() methods to traverse matching transactors. Also it’s possible to ensure the regular expression returns at least one transactor. Here is the same example written using these methods.</p>
<blockquote><p>1. string match_xactors = (cfg.mode == tb_cfg::PLAYBACK) ? &#8220;/Drivers/&#8221; : &#8220;/./&#8221;;</p>
<p>3. vmm_xactor_iter iter = new(&#8220;/./&#8221;, match_xactors);</p>
<p>4. if(iter.xactor()==null)</p>
<p>5. `vmm_fatal(log, $psprintf(&#8220;No matching transactors for ‘%s’”, match_xactors));</p>
<p>7. while(iter.xactor()!=null) begin</p>
<p>8.   xact = iter.xactor();</p>
<p>9.   xact.start_xactor();</p>
<p>10.end</p></blockquote>
<p>Should you need to reclaim the memory allocation required to store all transactors, it’s possible to enable garbage collection by invoking vmm_xactor::kill().</p>
<p>The good news is that vmm_xactor_iter allows me to:</p>
<ul>
<li>Configure the transactor without knowing its hierarchy</li>
<li>Provide dynamic access to transactors</li>
<li>Reduce code for multiple configurations and callback extensions</li>
<li>Use powerful regular expressions for name matching</li>
<li>Reuse transactors: no need to modify code when changing the environment content</li>
</ul>
<p>I hope you find vmm_xactor_iter, and all of the other VMM features, as useful as I do</p>
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