Verification Martial Arts: A Verification Methodology Blog

Using UVM Register Model

Posted by Vidyashankar Ramaswamy on October 22nd, 2012

When I was preparing for a customer presentation on UVM RAL, I could not understand what the UVM base class library is saying about updating the values of desired value and the mirror value registers. Also I felt that the terms used are not exactly reflecting the intent. After spending some time, I came up with a table which will help to understand the behavior when the register model APIs are called. . . . .

 For the complete post please visit