Verification Martial Arts: A Verification Methodology Blog

Vidyashankar Ramaswamy

Vidyashankar.bmp I specialize in RTL design and verification:  designing RTL blocks, architecting test benches and ensuring metrics-based verification closure.   Prior to joining Synopsys as a corporate applications engineer, I worked on the complete design flow of several network processor and micro-controllers ASICs.  I also managed a verification group focused on consumer product ASICs.